Week 6

1) Modify the programming to display the output text at LCD to display the output text at monitor.   


    The programming get error and take time to get solution. 


2) Try the another example of programming to display output text monitor.

Week 5

1) Do the programming to try display the output text at LCD on using FPGA

Block Diagram for LCD design

The coding to initialize the LCD module and display 'hello' using c


Void main()
{
  OpenComm();


//initialize the LCD module
WriteCommByte(0x38);
WriteCommByte(0x0F);
WriteCommByte(0x01);
Sleep(2);


//display "hello"
WriteCommByte('h' + (0x80);
WriteCommByte('e' + (0x80);
WriteCommByte('l' + (0x80);
WriteCommByte('l' + (0x80);
WriteCommByte('o' + (0x80);


CloseComm();
}



The  output  display  "hello"

2) Third briefing about Final Year Project report. The content of briefing are:

• Spine & cover (hard cover)
• Fran  page    
• Abstract
• Acknowledgement
• Table of content
• List of table
• List of figure
• Appendices
• Introduction
• Literature review
• Methodology
• Result
• Conclusion
• Recommendation
• Reference

Week 4

6/2/2012

Research the simple programming of VGA monitor.

The objective are:

• To study the simple programming  of VGA monitor.
• To know how the output display at VGA monitor.

8/2/2012


Study the detail about VGA monitor output. Do some research the theory about VGA monitor.

The objective are:

• To study more detail about VGA monitor.
• To know how the output display.

10/2/2012

Do the simple programming of VGA monitor.

The objective are:

• To creating a project
• To entering a simple programming
• To simulating the designed circuit

Week 3

31/1/2012


Do the programming introduction the Verilog Design using Quartus 2 software. It gives a general overview of the typical CAD flow for designing circuit that are implemented by using FPGA devices. The Quartus II system includes full support for all of the popular methods of entering a description of the desired circuit into a CAD system. 

This programming makes use of the Verilog design entry method, in which the user

specifies the desired circuit in the Verilog hardware description language. Two other versions of this programming are also available:

1.  Uses the VHDL hardware description language
2.  The other is based on defining the desired circuit in the form of a schematic diagram.

1/2/2012

The last step in the programming introduction the Verilog Design using Quartus 2  process is involves configuring the designed circuit in an actual FPGA device. To show how this is done, it is assumed that the user has access to the Altera DE2 Development and Education board connected to a computer that has Quartus II software installed.

The objective do the simple programming are:

• To creating a project
• To entering a schematic diagram
• To synthesizing a circuit from the schematic diagram
• To fitting a synthesized circuit into an Altera FPGA
• To assigning the circuit input and output to specific pins on the FPGA
• To simulating the designed circuit
• To programming and configuring the FPGA chip on Altera DE2 board

2/2/2012

Meet supervisor Madam Norhaslinawati Binti Ramli.

The objective are:

• To discuss the progress of project.
• To discuss with supervisor about the programming.
• To discuss with supervisor the problem about hardware.